Local input/output (I/O) processing generally refers to the communication between an information processing system, such as a general purpose computer, and peripheral devices, such as Network Interface Cards (NICs), graphics processors, printers, scanners, data storage devices, and user input devices, among others. Common I/O paradigms include Peripheral Component Interconnect (PCI) and PCI Express (PCIe). In these traditional I/O paradigms, peripheral devices are able to access main memory directly through Direct Memory Access (DMA) reads and writes. A device driver hosted by the processor reserves a portion of host memory for various queues and control structures to handle interactions with the peripheral device. Such information may be referred to as state information and may include, for example, transmit/receive queues, completion queues, data buffers, and the like. Further, the peripheral device creates a shadow copy of the state information in the local memory of the peripheral device. The state information informs the peripheral device about various aspects of the organization of the host memory, such as where to obtain work requests, the host memory addresses of related read and write operations, the location of completion queues, interrupt vectors, and the like. Accordingly, certain amount of processing overhead is directed to synchronizing the state information between the host and the peripheral device.
Traditional I/O protocols generally involve a large overhead of control commands associated with the information transmitted between the host and the peripheral device. For example, processing one Ethernet frame may involve 5 to 10 PCI transactions, which may result in a high degree of latency as well as inefficient use of the PCI bus or link. The techniques used to improve latency and efficiency often introduce added degrees of complexity in an I/O transaction. Further, if the state information between the host and the peripheral device becomes unsynchronized, the peripheral device can improperly access the host memory and cause silent data corruption, which is data corruption that goes undetected possibly resulting in system instability. Accordingly, various memory protection protocols are followed to reduce the likelihood that a peripheral device will access memory not allocated to it. The memory protection protocols add yet another level of complexity to the I/O processes.